Settable Countdown Timer

VHDL programming project with FPGA Basys3 board representing a settable countdown timer by using 4 buttons of the board to increase/decrease seconds/tens of seconds/minutes/tens of minutes, and an extra button to pause/resume the timer.

Date: March 2016 -> July 2016

Technologies Used: VHDL | Xilinx Vivado Software | Digilent Basys3 board with a Xilinx Artix 7 FPGA

Report: download

Code: send me an email

Video Demonstration: Coming Soon